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Free Intellectual Properties

 

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Currenty these are the available IPs for download. All of these IP have been simulated, debugged and tested on CPLD/FPGA platforms and working prototypes are in existance.
 A word about licencing:
The designs in this site are the property of the stated designer. The designer has consented the free (no monetary compensation) distribution and modification of the designs for individual uses.
 A word about feedback
If anyone discovers design issues, or problems encountered during compilation or any other problems which might benefit others, please report them to jlee@cmosexod.com
  A word about Bugs
Every effort has been placed in making sure the cores in this site are bug free. This includes cross platform compilation (to ensure the core compiles on differenct platforms). And the cores are actually tested on CPLD/FPGA protoboards. Despite this, it is likely that bugs still looms around. Subscribe to the mailling list to be notified of bug fixes.
If you wish to be notified of upcoming new cores, or would like to suggest new ones, please fill out this form. This list will not be abused, and is confidential.

 

Design

Description

Platform

Platform/ Device which the design was tested

 Designer

 Date Posted
Reliance-1

12bit DSP core and peripherals. Suitable for performing real-time signal processing, such as equalizer on stereo audio inputs.

Schematic Viewlogic / (3 Lattice isp30256, 4 Lattice isp1016) Joon Lee
PopCorn-1 A small, yet powerful 8 bit CISC processor. Add 4Kbyte of RAM and upto 4Kb of your own code, and you have a complete embedded processor ! Verilog Altera Max+PlusII v9.21

Lattice ispEXPERT v7.2

Xilinx Foundation Base Express v2.1i

 Joon Lee  2/99

revised 3/00

 Acorn-1 Similar to PopCorn-1. This actually has 1 interrupt input. The only thing about this design which really is different from PopCorn-1 is the fact that I've used Altera's 10K20 FPGA, rather than a Lattice part.  VHDL (93) Max+PlusII / 1 Flex 10K20  Joon Lee
Digital Thermometer Add an off-shelf serial thermal sensor such as National's LM75 and you have yourself a digital thermometer Verilog / ABEL ispEXPERT / 1 Lattice isp3256-90  Joon Lee
 Auto-Ranging Frequency counter Self contained "single-chip" frequency counter. The design is configured to measure upto 9.999MHz, but you can go up to as much as your device technology allows.  VHDL (93) Max+PlusII / 1 Flex 10K20

ispEXPERT / 1 Lattice isp3256

 Joon Lee  4/30/99
 SDRAM Controller This IP lets you use a large capacity Synchronous DRAM as if it were an SRAM. Customizable design allows easy modification for other densities.  Verilog Altera Max+PlusII v9.21

Lattice ispEXPERT v7.2

Xilinx Foundation Base Express v2.1i

 Joon Lee  1/2000